Re: NVIDIA 8800 integer performance
- From: "Wei Dai" <usenet@xxxxxxxxxx>
- Date: Sat, 31 Mar 2007 08:05:24 GMT
"Phil Carmody" <thefatphil_demunged@xxxxxxxxxxx> wrote in message news:873b3n84os.fsf@xxxxxxxxxxxxxxxxxxxxxxx
My money is on the 32 bit multiply being implemented in microcode
as 4 16*16->32 multiplies, as the [u]mul24 (24*24->low32)
instructions take only 2 clock ticks.
But to do a 32 bit multiply as 4 16 bit multiplies, you'd also have to do at least two 32 bit additions, which also cost 2 cycles each, so it would be 12 cycles total. Or are you assuming that the ALUs also have an unpublished 2 cycle 16-bit multiply-and-add instruction?
BTW, what is the story behind the stream of nonsensical messages being posted constantly to this group with a certain three letter subject prefix? Some kind of denial of service attack against the newsgroup? An out of control AI experiment?
.
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