A variant of the shrinking generator

From: Joe (jooyeon_cho_at_hotmail.com)
Date: 07/15/04 

Date: 15 Jul 2004 00:34:25 -0700

Hi all

I'd like to ask something on the Shrinking generator (SG) by
Coppersmith, et all at 1993.

As the designers pointed out in their original paper, practically the
SG requires a higher frequency and some size of buffer for assuring
the regular output rate.

There were two papers on the practical aspects of the SG as like
below.

1. Krawczyk, H. "Practical Aspects of the Shrinking Generator", in
Fast Software Encryption, Lecture Notes in Computer Science Vol. 809,
Springer-Verlag, R. Anderson, ed , 1993.

2. Kessler, I., and Krawczyk, H., "Minimum Buffer Length and Clock
Rate for the Shrinking Generator Cryptosystem", IBM Research Report,
RC 19938 (88322), 1995.

But I failed to get them over the internet.

(If someone has an electronic copy of them, please send me by e-mail.
I will really appreciate it.)

BTW, I am thinking about a variant of the SG with a slight
modification as below.

            |-> LFSR 1 -------->|-----|
            | | AND |-----------|
            | |-->|-----| |
            | | |
            | | |
   clock ---|-> LFSR S -----| XOR ----> keystream
            | | |
            | |-> INV ->|-----| |
            | | AND |-----|
            |-> LFSR 2 -------------->|-----|

INV : inverter, AND : AND gate, XOR : XOR gate

I think the regular output rate will be guaranteed with holding the
same level of security as the SG in this scheme.

I'm just wonthering whether there was any previous work on this
scheme.

All comments are welcome.

Regards
Joe

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